The minimum feature sizes of integrated circuits (ICs) have been shrinking for years. Commensurate with this size reduction, various process limitations have made IC fabrication more difficult. One area of fabrication technology in which such limitations have appeared is photolithography.
An integral component of a photolithographic apparatus is a “reticle” which includes a pattern corresponding to features at one layer in an IC design. As light passes through the reticle, it is refracted and scattered by the chromium edges. This causes the projected image to exhibit some rounding, and other optical distortions. While such effects pose relatively little difficulty in layouts with large feature sizes (e.g., layouts with critical dimensions above about 1 micron), they cannot be ignored in layouts having features smaller than about 1 micron. The problems become especially pronounced in IC designs having feature sizes near the wavelength of light used in the photolithographic process.
To remedy this problem, a reticle correction technique known as optical proximity correction (OPC) has been developed. Optical proximity correction involves adding dark regions to and/or subtracting dark regions from a reticle design at locations chosen to overcome the distorting effects of diffraction and scattering. Typically, OPC is performed on a digital representation of a desired IC pattern. First, the digital pattern is evaluated with software to identify regions where optical distortion will result, and a digital representation of a reticle or photomask design is modified to create an optically corrected or OPC mask. The modification is performed by a computer having appropriate software for performing OPC. A mask simulator is then used to emulate the wafer printing characteristics of the OPC mask during optical lithography, resulting in an OPC aerial image.
To calculate the quality of the OPC mask, process engineers manually compare the target design to the aerial image to determine if features patterned within the aerial image are within some threshold of the corresponding features in the target design. This is done by measuring distances between the points in the target design and the corresponding points in the aerial image. Evaluation of each point requires analysis of surrounding features in two-dimensions to determine whether problematic diffraction effects are likely. Places in the mask that result in distances greater than the specified threshold are corrected (e.g., serif or segment removal, for example), and the process is repeated until acceptable results are obtained. A problem with this process is that engineers must first manually identify the geometric points in the target design to compare to the aerial image, and then visually determine if the points in the target design are separated by less than the threshold from the corresponding points in the aerial image. Furthermore, when the aerial image deviates from the target design, the mask quality is typically analyzed only at particular locations.
During the simulation process, the aerial image is calculated based on intensity values at nodes of a lattice. During the simulation, the intensity values of the nodes are calculated and the first derivatives of those values are calculated at all of the nodes of the lattice. A problem with this process is that calculating the first derivatives of all the values for all of the nodes is time consuming, which slows down aerial image simulation speeds.
Accordingly, what is needed is a method and system for improving aerial image simulation speeds. The present invention addresses such a need.